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Zarlink First To Deliver Complete Circuit Emulation Services-over-Packet Portfolio with Launch of New Low-Density Chips

Industry's only circuit-over-packet processor family capable of sending from one to 32 T1/E1 streams of TDM traffic over any PSN (packet-switched network)

OTTAWA, Canada, Sept. 29 /PRNewswire-FirstCall/ -- Zarlink Semiconductor (NYSE/TSX:ZL), with the launch of three low-density CES (Circuit Emulation Services)-over- Packet processors, now offers the industry's only end-to-end portfolio of circuit-to-packet devices.

The three-chip ZL(TM)O50120 family utilizes CES-over-Packet technology to seamlessly "tunnel" one, two or four streams of TDM (Time Division Multiplex) voice, video and data traffic, with associated timing and signaling, across Ethernet, IP (Internet Protocol) and MPLS (Multiprotocol Label Switching) networks. Complementing the ZL50111 family of high-density CES-over-Packet processors, Zarlink delivers circuit-to-packet bridging devices that handle from one to 32 streams of TDM traffic.

"Dealing with the transport of legacy services is an important element in the rollout of Enterprise packet networks," said Jeremy Lewis, product line manager, Packet Processing, Zarlink Semiconductor. "With our new low-density packet processors, carriers can build out cost-effective packet networks to the Enterprise, without service disruptions to, or requiring significant infrastructure upgrades from, their customers."

Powering the packet network rollout

Facing growing data traffic volumes and increased competition from cable providers, carriers are under pressure to quickly extend their packet networks. At the same time, Enterprise customers are demanding high-bandwidth Ethernet connections without sacrificing service quality or requiring a "rip and replace" equipment upgrade.

With Zarlink's CES-over-Packet technology, carriers can expand the reach of their packet networks and offer valuable new services to retain and attract customers. By using a CES-over-Packet-enabled remote concentrator located at the customer site or a roadside pedestal, TDM traffic can be emulated across a converged packet network that cost-effectively delivers multiple services to the end user.

Similarly, mobile service operators who previously relied on expensive T1/E1 leased lines to backhaul traffic from the cell site, can instead emulate TDM traffic over a cost-effective fiber or microwave Ethernet link. This protects service operators with significant investments in TDM and ATM (Asynchronous Transfer Mode)-based networks. Zarlink's CES-over-Packet devices also fit seamlessly into FTTx (Fiber-to-the-x) systems, including ePONs (Ethernet Passive Optical Networks) that meet the recently ratified IEEE 802.3ah standard.

In addition, Zarlink's CES-over-Packet technology allows end customers to protect their investment in legacy networking equipment, while enjoying the operating cost savings afforded by a converged packet network. Zarlink recently announced that four equipment manufacturers in the United States and Korea - Comtec Systems, Eagle Telephonics, Intronics Inc. and Rivertree Networks - are responding to user demand by designing Zarlink CES-over-Packet processors into new media gateways, Central Office and Ethernet switching products that transport TDM services over packet networks.

This year Zarlink also announced interoperability between the ZL50111 processor and the Arranto 100TE multi-service TDM-over-Packet Gateway from Redux Communications; and with the AXN Multiservice Packet Concentrator with CESoP support, from Axerra Networks.

Low-density packet processor family

The new ZL50120 packet processor family consists of three devices. The ZL50118 chip supports a single T1/E1 stream, the ZL50119 device supports two T1/E1 streams, while the ZL50120 chip supports four T1/E1 streams. All three processors include a user-side Fast Ethernet port, allowing them to aggregate both Ethernet and TDM traffic and significantly simplify system-level design.

Achieving precise network timing is a key challenge when delivering constant bit-rate voice traffic over variable bit-rate PSNs. Zarlink's low- density ZL50120 processor family implements more than 15 patent-pending hardware/software processing techniques for clock recovery and synchronization to ensure carrier-class voice quality.

Voice quality is also enhanced by advanced on-chip QoS (Quality of Service) mechanisms, such as weighted fair queuing and strict priority, which minimize the effects of network latency by giving time-sensitive voice packets priority over data packets in processing queues. The devices deliver an extremely low and stable latency connection, with intrinsic delays of less than 250 microseconds.

Simplifying design, meeting standards

The ZL50120 family simplifies board-level design for manufacturers. With on-chip SRAM (static random access memory) capable of handling network delays of more than 100 milliseconds with comparable packet delay variations, line card designers do not require external memory devices. The processors also provide direct connectivity to a LIU (line interface unit) or Framer on the TDM side, and to an Ethernet PHY (physical layer) device on the packet side, providing a very minimal chip-count solution.

Zarlink's ZL50120 processor family complies with all Circuit Emulation Services draft standards currently under development with the MEF (Metro Ethernet Forum), IETF (Internet Engineering Task Force) and the MPLS-Frame Relay Alliance, as well as the recently published ITU-T (International Telecommunications Union-Telecommunications) Y.143 recommendation.

Pricing and availability

The ZL50120 packet processors are in volume production. A complete reference design, an evaluation board and a software API (application programming interface) support the chips. All three devices are offered in a 23 mm x 23 mm, 324-ball PBGA (plastic ball grid array) package. In quantities of 5,000, the ZL50118 is priced at US$39.15, the ZL50119 at US$49.59, and the ZL50120 at US$66.12.

For more information on the ZL50120 packet processor family and CESoP, please visit http://cesop.zarlink.com/ .

About Zarlink

Semiconductor For almost 30 years, Zarlink Semiconductor has delivered semiconductor solutions that drive the capabilities of voice, enterprise, broadband and wireless communications. The Company's success is built on its technology strengths, including voice and data networks, consumer and ultra low-power communications, and high-performance analog. For more information, visit http://www.zarlink.com/ .

  Certain statements in this press release constitute forward-looking
  statements within the meaning of the Private Securities Litigation Reform
  Act of 1995. Such forward-looking statements involve known and unknown
  risks, uncertainties, and other factors which may cause the actual
  results, performance or achievements of the Company to be materially
  different from any future results, performance, or achievements expressed
  or implied by such forward-looking statements. Such risks, uncertainties
  and assumptions include, among others, the risks discussed in documents
  filed by the Company with the Securities and Exchange Commission.
  Investors are encouraged to consider the risks detailed in those filings.

  Zarlink, ZL, and the Zarlink Semiconductor logo are trademarks of Zarlink
  Semiconductor Inc. A high-resolution photograph is available at
  http://news.zarlink.com/visual_center/ .

CONTACT: Zarlink, Ed Goffin, Media Relations, (613) 270-7112,
edward.goffin@zarlink.com; United States, Natalie Sauve, High Road
Communications, (613) 236-0909, nsauve@highroad.com; Europe, Simon Krelle,
Pinnacle Marketing Communications, 44 1908 2355 22,
simonk@pinnacle-marketing.com

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